Technical Field
The disclosure of the present invention generally relates to a non-volatile memory (NVM) device and the method for fabricating the same, and more particularly to a vertical channel memory and the method for fabricating the same.
Description of the Related Art
An NVM device which is able to continually store information even when the supply of electricity is removed from the device containing the NVM cell has been widely adopted by bulk solid state memory applications in the art.
The method for fabricating an NVM device having a vertical channel, such as a vertical channel NAND flash memory device, generally includes steps as follows: A multilayers stack configured by a plurality of insulating layers and a plurality of poly-silicon layers alternatively stacked with each other is firstly provided on a semiconductor substrate. At least one through hole or trench is then formed in the multilayers stack, and a memory layer with silicon-oxide-nitride-oxide-silicon (SONOS), bandgap engineered SONOS (BE-SONOS), or charge trapping memories structure and a poly-silicon channel layer are formed in sequence on the side al s of the through hole/trench, whereby a plurality of memory cells are defined at the intersection points formed by the memory layer, the channel layer and the poly-silicon layers; and the memory cells are electrically connected to the semiconductor substrate that can serve as a bottom common source line for performing a block erase operation of the NVM device through the channel layer.
However, since the traditional bottom common source line is typically a doped region with rather high resistance formed in the semiconductor substrate, and parasitic junction may occur between the doping region and the semiconductor substrate, thus the power consumption may be increased, and the program/read operation reliability and device speed may be deteriorated by signal interference and RC delay due to the parasitic junction capacitance.
Therefore, there is a need of providing a memory device and the method for fabricating the same to obviate the drawbacks encountered from the prior art.